The EP AMC DEV board is a standalone development board for advanced mezzanine cards (AMC). It is an AMC carrier primarily intended for testing and verification of ports 0-11 on AMC module designs and for software development using AMC modules.
- Form Factor: AMC cutaway carrier AMC.0 (2 slots operational). All of Embedded Planet’s AMC boards have been tested and verified in EP AMC DEV Test Chassis.
- Power Supply: Standard ATX with minimum requirements; +12v@ 17A (each AMC slot requires 8.5A including fans), +5v_STBY@ 500ma, +3.3v@ 3A
- Operating Temp: 0-55C
- Cooling: 2 fans per AMC slot, 4.2 CFM per fan.
- IMPI: Renesas_H8S2167 Microcontroller. Based on Pigeon Point BMR-H8S-ATCA reference design. Serial ports, 2×5 header. Optional debug header, 2×7 header.
- FCLK clock generator: 100Mhz or 125Mhz, jumper selectable. LVDS or HSCL, jumper selectable.
- TCLKA clock generator: Build specific options for frequency and format. Default is 19.44Mhz, LVDS. Contact EP for other options.
- TCLKC clock generator: Build specific options for frequency and format. Default is 8.0Khz, LVDS. Contact EP for other options.
- HOT SWAP controller: +3.3v@150ma management power per AMC slot. +firstname.lastname@example.orgA Payload power per AMC slot.
- MID-BUS Probe land patterns: 3 MID-BUS probe land patterns for complete AMC port 0-11 access.
- SFP+ connectors: Jumper selectable connections for AMC ports 0-1 to the other AMC slot or to the rear access SFP+ connectors allowing for customer specific SFP modules.
- SERDES: Routed length of 282mm between AMC slots to simulate actual 5G system.
Standalone AMC Verification and Development System
The EP AMC DEV board is a standalone development board for advanced mezzanine cards (AMC). It is an AMC carrier primarily intended for testing and verification of ports 0-11 on AMC module designs and for software development using AMC modules. The EP board operates as a stand-alone carrier powered from an ATX power supply and implements full hot swap support and also incorporates an IPMI controller (IPMC) based on the Pigeon Point BMR-H8S-ATCA reference design.
The EP AMC DEV board has direct connectivity for AMC ports 0-11 between the 2 AMC slots and was designed to simulate the maximum trace path for MicroTCA and ATCA systems, with a port to port length of 282mm for verification of 5G rates as in an actual system environment.
The EP AMC DEV board has full access to all SERDES ports 0-11 signals via the on board Mid-Bus Probe land patterns allowing easy connections to logic analyzers and protocol test equipment.
Additional features include the ability to route AMC ports 0-1 for each AMC slot to the rear SFP+ ports. Onboard fans provide direct air flow for each AMC slot.
There are several on board clock generators;
- The AMC FCLK clock generator is selectable for 100Mhz or 125Mhz and can also be selected for LVDS or HSCL termination. This clock signal can be routed out to the AMC slot connectors or an external clock source can be provided via the on board SMA connectors.
- Optional clock generators for the AMC TCLKA and TCLKC clocks are provided by onboard generators and have many frequency and signal format options. The default for these signals is TCLKA is 19.44Mhz and LVDS format, TCLKC is 8Khz and LVDS format, contact Embedded Planet for more frequency and format options. Both TCLKA and TCLKC can be provided by an external clock source via the onboard SMA connectors.